WebFPGA
41
FR version is available. Content is displayed in original English for accuracy.
Advertisement
Advertisement
⚡ Community Insights
Discussion Sentiment
100% Positive
Analyzed from 668 words in the discussion.
Trending Topics
#chip#boards#https#small#parts#fpga#language#enough#more#larger
Discussion (20 Comments)Read Original on HackerNews
The OSS toolchains have matured a lot since then, with parts from Lattice being fairly well supported if you don't want to touch a vendor's tooling.
Gowin have some of the more interesting new parts which sit on a different part of the cost/feature curve. The Tang Nano boards seem fairly popular but I only have experience with far larger GW5 parts.
The newer parts from Intel/AMD have increasingly impressive hard-peripherals and internal features, but not that relevant unless you know what you want/need.
From what I understand, one of the big advantages of the up5k chip (the same chip on the webfpga and the icebreaker) is that there's an open toolchain that runs in seconds (at this chip size), which is not the case in the closed/Vivado/"typical fpga" part of the world. (feel free to correct me)
Purely in simulation this week, I had Claude (Fable) design a working Tetris out of 1400 relays - originally, this was for a Minivac web simulator that I/Fable had built [1]. Then, it compiled the relay netlist to Verilog and ran it on the simulated chip, comparing this (bezerk) port relay-for-relay against the original simulator. All matching (total llm time: less than an hour). I had it also make a viz of the netlist blinking through one simulated run [2] - sort of like visual6502.org..!
Today, I (Fable) ported tinystories [3], a very small language model to this exact same chip. It's currently "golfing" to get it to fit onto the real chip size (it's ~10% over, I'm hopeful). EDIT: it just golfed it! ~~7 tokens/sec at 12Mhz in simulation!
None of these are "use cases", but these boards seem small/cheap enough that you can do new deranged things with them, which is very very exciting to me. I see a great future.
[0] https://1bitsquared.com/products/icebreaker
[1] https://minivac.greg.technology/tetris/
[2] https://necessary-doom-48128.ondis.co/
[3] https://arxiv.org/abs/2305.07759
The example have a limited language of around 1000 words, but make it possible to do Python (like) programming with LLM on an ESP32.
re: language model - here, the embedding lookup, layers, logits all run on-chip and loops its own output back.
the only off-chip piece is the id to string table, i.e. the chip (once I get it!) will speak token ids and my laptop will print them as letters
* replacements for the C64 PLA, CIA, and potentially the SID
* Glue logic for a bread board project where it would require a lot of 74 or 4k series logic
* Translating TTL to VGA etc.
These are things people have used FPGAs for quite commonly
[1] https://github.com/olofk/serv
Small boards have less I/O pins than larger boards typically, and small/cheap FPGA chips on small boards are also more limited than larger, more expensive parts.
Edit: precise price.
https://a.co/d/05f9gq9A
“KooingTech 150MHZ Machine Pulse Chip Mode Chip ACE V3 for X360 Slim”